The key component in achieving the highest energy efficiency ratio for the GRAPE-8 system is the use of eASIC´s Nextreme-2 NEW ASIC devices, which are commonly used for replacing FPGAs for high volume and power sensitive applications. Manufactured using a low-power 45nm LP process, and employing single via programming which eliminates the need for power hungry SRAMs that FPGAs require for programming look-up tables and routing, eASIC devices typically enable FPGA users to achieve up to 80% lower power consumption. eASIC´s unique GreenPowerVia technology also enables users to completely turn off any logic and memories that are unused in a design.
eASIC´s devices have enabled us to take a giant step forward in resolving the power issue with next generation supercomputers, commented Junichiro Makino, Professor at Tokyo Institute of Technology Graduate School of Science and Engineering. Standard cell ASIC was prohibitively expensive and FPGA power consumption simply could not allow us to beat the previous record of 2.1GFLOPS/Watt which was held by IBM´s BG/Q green supercomputer. eASIC´s NEW ASIC allowed us to achieve a new record of 6.5 GFLOPS/Watt, added Makino.
This great accomplishment by Junichiro Makino and his team is testament to the innovative power saving technology eASIC has developed, said Jasbinder Bhoot, Vice President of Marketing, eASIC Corporation. The energy efficiency numbers they are demonstrating are very impressive. In many industries ranging from wireless infrastructure to enterprise storage, we are helping customers overcome the power problems caused by FPGAs. When low-power consumption is paramount, like Tokyo Institute of Technology´s GRAPE-8 processor, eASIC´s Nextreme-2 devices are the ideal choice, added Bhoot.